89C51 Microcontroller Introduction
Microcontrollers are used in a multitude of commercial applications such as modems, motor-control systems, air conditioner control systems, automotive engine and among others. The high processing speed and enhanced peripheral set of these microcontrollers make them suitable for such high-speed event-based applications. However, these critical application domains also require that these microcontrollers are highly reliable. The high reliability and low market risks can be ensured by a robust testing process and a proper tools environment for the validation of these microcontrollers both at the component and at the system level. Intel Plaform Engineering department developed an object-oriented multi-threaded test environment for the validation of its AT89C51 automotive microcontrollers. The goals of this environment was not only to provide a robust testing environment for the AT89C51 automotive microcontrollers, but to develop an environment which can be easily extended and reused for the validation of several other future microcontrollers. The environment was developed in conjunction with Microsoft Foundation Classes (AT89C51). The paper describes the design and mechanism of this test environment, its interactions with various hardware/software environmental components, and how to use AT89C51.
Are 8-bit microcontroller early or 4 bits. One of the most successful is the INTEL 8031, for a simple, reliable and good performance was a lot of praise. Then developed in 8031 out of MCS51 MCU Systems. SCM systems based on this system until now is still widely used. With the increased requirements of industrial control field, began a 16-bit microcontroller, but not ideal because the cost has not been very widely used. After 90 years with the great development of consumer electronics, microcontroller technology has been a huge increase. With INTEL i960 series, especially the later series of widely used ARM, 32-bit microcontroller quickly replace high-end 16-bit MCU status and enter the mainstream market. The traditional 8-bit microcontroller performance have been the rapid increase capacity increase compared to 80 the number of times. Currently, high-end 32-bit microcontroller clocked over 300MHz, the performance catching the mid-90s dedicated processor, while the average model prices fall to one U.S. dollar, the most high-end model is only 10 dollars. Modern SCM systems are no longer only in the development and use of bare metal environment, a large number of proprietary embedded operating system is widely used in the full range of SCM. The handheld computers and cell phones as the core processing of high-end microcontroller can even use a dedicated Windows and Linux operating systems.
SCM relies on the program, and can be modified. Through different procedures to achieve different functions, in particular special unique features, this is another device much effort needs to be done, some are great efforts are very difficult to achieve. A not very complex functions if the 50's with the United States developed 74 series, or the 60's CD4000 series of these pure hardware buttoned, then the circuit must be a large PCB board! But if the United States if the 70's with a series of successful SCM market, the result will be a drastic change! Just because you are prepared by microcomputer programs can achieve high intelligence, high efficiency and high reliability!
Introduction
The 8-bit AT89C51 CHMOS microcontrollers are designed to handle high-speed calculations and fast input/output operations. MCS 51 microcontrollers are typically used for high-speed event control systems. Commercial applications include modems,
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motor-control systems, printers, photocopiers, air conditioner control systems, disk drives, and medical instruments. The automotive industry use MCS 51 microcontrollers in engine-control systems, airbags, suspension systems, and antilock braking systems (ABS). The AT89C51 is especially well suited to applications that benefit from its processing speed and enhanced on-chip peripheral functions set, such as automotive power-train control, vehicle dynamic suspension, antilock braking, and stability control applications. Because of these critical
applications, the market requires a reliable cost-effective controller with a low interrupt latency response, ability to service the high number of time and event driven integrated peripherals needed in real time applications, and a CPU with above average processing power in a single package. The financial and legal risk of having devices that operate unpredictably is very high. Once in the market, particularly in mission critical applications such as an autopilot or anti-lock braking system, mistakes are financially
prohibitive. Redesign costs can run as high as a $500K, much more if the fix means back annotating it across a product family that share the same core and/or peripheral design flaw. In addition, field replacements of components is extremely expensive, as the devices are typically sealed in modules with a total value several times that of the component. To mitigate these problems, it is essential that comprehensive testing of the controllers be carried out at both the component level and system level under worst case environmental and voltage conditions.This complete and thorough validation necessitates not only a well-defined process but also a proper environment and tools to facilitate and execute the mission successfully.
Intel Chandler Platform Engineering group provides post
silicon system validation (SV) of various micro-controllers and processors. The system validation process can be broken into three major parts.The type of the device and its application requirements determine which types of testing are performed on the device.
The AT89C51 provides the following standard features: 4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bittimer/counters, a five vector two-level interrupt architecture,a full duple ser -ial port, on-chip oscillator and clock circuitry.In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters,serial port and interrupt sys -tem to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscil -lator disabling all other chip functions until the next hardware reset.
Pin Description
VCC Supply voltage. GND Ground. Port 0
Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.
Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.
Port 0 also receives the code bytes during Flash programming,and outputs the code
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bytes during program verification. External pullups are required during program verification.
Port 1
Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers can sink/so -urce four TTL inputs.When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.
Port 1 also receives the low-order address bytes during Flash programming and verification.
Port 2
Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups.
Port 2 emits the high-order address byte during fetches from external program memory and during accesses to Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups.
Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some control signals durin Flash programming and verification.
Port 3
Port 3 is an 8-bit bi-directional I/O port with internal pullups.The Port 3 output buffers can sink/sou -rce four TTL inputs.When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.
RST
Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.
ALE/PROG
Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory.
This pin is also the program pulse input (PROG) during Flash programming.
In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped duri -ng each access to external DataMemory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.
PSEN
Program Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to
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external data memory.
EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.
The AT89C51 code memory array is programmed byte-bybyte in either programming mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode.
Data Polling: The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and
the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.
Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.
Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.
A microcomputer interface converts information between two forms. Outside the microcomputer the information handled by an electronic system exists as a physical signal, but within the program, it is represented numerically. The function of any interface can be broken down into a number of operations which modify the data in some way, so that the process of conversion between the external and internal forms is carried out in a number of steps.
An analog-to-digital converter(ADC) is used to convert a continuously variable signal to a corresponding digital form which can take any one of a fixed number of possible binary values. If the output of the transducer does not vary continuously, no ADC is necessary. In this case the signal conditioning section must convert the incoming signal to a form which can be connected directly to the next part of the interface, the input/output section of the microcomputer itself.
Output interfaces take a similar form, the obvious difference being that here the flow of information is in the opposite direction; it is passed from the program to the outside world. In this case the program may call an output subroutine which supervises the operation of the interface and performs the scaling numbers which may be needed for a digital-to-analog converter(DAC). This subroutine passes information in turn to an output device which produces a corresponding electrical signal, which could be converted into analog form using a DAC. Finally the signal is conditioned(usually amplified) to a form suitable for operating an actuator.
The signals used within microcomputer circuits are almost always too small to be
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connected directly to the “outside world” and some kind of interface must be used to translate them to a more appropriate form. The design of section of interface circuits is one of the most important tasks facing the engineer wishing to apply microcomputers. We have seen that in microcomputers information is represented as discrete patterns of bits; this digital form is most useful when the microcomputer is to be connected to equipment which can only be switched on or off, where each bit might represent the state of a switch or actuator.
To solve real-world problems, a microcontroller must have more than just a CPU, a program, and a data memory. In addition, it must contain hardware allowing the CPU to access information from the outside world. Once the CPU gathers information and processes the data, it must also be able to effect change on some portion of the outside world. These hardware devices, called peripherals, are the CPU’s window to the outside.
The most basic form of peripheral available on microcontrollers is the general purpose I70 port. Each of the I/O pins can be used as either an input or an output. The function of each pin is determined by setting or clearing corresponding bits in a corresponding data direction register during the initialization stage of a program. Each output pin may be driven to either a logic one or a logic zero by using CPU instructions to pin may be viewed (or read.) by the CPU using program instructions.
Some type of serial unit is included on microcontrollers to allow the CPU to communicate bit-serially with external devices. Using a bit serial format instead of bit-parallel format requires fewer I/O pins to perform the communication function, which makes it less expensive, but slower. Serial transmissions are performed either synchronously or asynchronously. Its applications
SCM is widely used in instruments and meters, household appliances, medical equipment, aerospace, specialized equipment, intelligent management and process control fields, roughly divided into the following several areas:
SCM has a small size, low power consumption, controlling function, expansion flexibility, the advantages of miniaturization and ease of use, widely used instrument, combining different types of sensors can be realized, such as voltage, power, frequency, humidity, temperature, flow, speed, thickness, angle, length, hardness, elemental, physical pressure measurement. SCM makes use of digital instruments, intelligence,
miniaturization, and functionality than the use of more powerful electronic or digital circuits. Such as precision measuring equipment (power meter, oscilloscope, various analytical instrument).
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89C51单片机简介
单片机广泛应用于商业：诸如调制解调器，电动机控制系统，空调控制系统，汽车发动机和其他一些领域。这些单片机的高速处理速度和增强型外围设备集合使得它们适合于这种高速事件应用场合。然而，这些关键应用领域也要求这些单片机高度可靠。健壮的测试环境和用于验证这些无论在元部件层次还是系统级别的单片机的合适的工具环境保证了高可靠性和低市场风险。Intel 平台工程部门开发了一种面向对象的用于验证它的AT89C51汽车单片机多线性测试环境。这种环境的目标不仅是为AT89C51汽车单片机提供一种健壮测试环境，而且开发一种能够容易扩展并重复用来验证其他几种将来的单片机。开发的这种环境连接了AT89C51。本文讨论了这种测试环境的设计和原理，它的和各种硬件、软件环境部件的交互性，以及如何使用AT89C51。
早期的单片机都是8位或4位的。其中最成功的是INTEL的8031，因为简单可靠而性能不错获得了很大的好评。此后在8031上发展出了MCS51系列单片机系统。基于这一系统的单片机系统直到现在还在广泛使用。随着工业控制领域要求的提高，开始出现了16位单片机，但因为性价比不理想并未得到很广泛的应用。90年代后随着消费电子产品大发展，单片机技术得到了巨大的提高。随着INTEL i960系列特别是后来的ARM系列的广泛应用，32位单片机迅速取代16位单片机的高端地位，并且进入主流市场。而传统的8位单片机的性能也得到了飞速提高，处理能力比起80年代提高了数百倍。目前，高端的32位单片机主频已经超过300MHz，性能直追90年代中期的专用处理器，而普通的型号出厂价格跌落至1美元，最高端的型号也只有10美元。当代单片机系统已经不再只在裸机环境下开发和使用，大量专用的嵌入式操作系统被广泛应用在全系列的单片机上。而在作为掌上电脑和手机核心处理的高端单片机甚至可以直接使用专用的Windows和Linux操作系统。
单片机是靠程序的，并且可以修改。通过不同的程序实现不同的功能，尤其是特殊的独特的一些功能，这是别的器件需要费很大力气才能做到的，有些则是花大力气也很难做到的。一个不是很复杂的功能要是用美国50年代开发的74系列，或者60年代的CD4000系列这些纯硬件来搞定的话，电路一定是一块大PCB板！但是如果要是用美国70年代成功投放市场的系列单片机，结果就会有天壤之别！只因为单片机的通过你编写的程序可以实现高智能，高效率，以及高可靠性！
介绍
8位AT89C51 CHMOS工艺单片机被设计用于处理高速计算和快速输入/输出。MCS51单片机典型的应用是高速事件控制系统。商业应用包括调制解调器，电动机控制系统，打印机，影印机，空调控制系统，磁盘驱动器和医疗设备。汽车工业把MCS51单片机用于发动机控制系统，悬挂系统和反锁制动系统。AT89C51尤其很好适用于得益于它的处理速度和增强型片上外围功能集，诸如：汽车动力控制，车辆动态悬挂，反锁制动和稳定性控制应用。由于这些决定性应用，市场需要一种可靠的具有低干扰潜伏响应的费用-效能控制器，服务大量时间和事件驱动的在实时应用需要的集成外围的能力，具有在单一程序包中高出平均处理功率的中央处理器。拥有操作不可预测的设备的经济和法律风险是很高的。一旦进入市场，尤其任务决定性应用诸如自动驾驶仪或反锁制动系统，错误将是财力上所禁止的。重新设计的费用可以高达500K美元，如果产品族享有同样内核或外围设计缺陷的话，费用会更高。
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另外，部件的替代品领域是极其昂贵的，因为设备要用来把模块典型地焊接成一个总体的价值比各个部件高几倍。为了缓和这些问题，在最坏的环境和电压条件下对这些单片机进行无论在部件级别还是系统级别上的综合测试是必需的。Intel Chandler平台工程组提供了各种单片机和处理器的系统验证。这种系统的验证处理可以被分解为三个主要部分。系统的类型和应用需求决定了能够在设备上执行的测试类型。
AT89C51提供以下标准功能：4k 字节FLASH闪速存储器，128字节内部RAM，32个I/O口线，2个16位定时/计数器，一个5向量两级中断结构，一个全双工串行通信口，片内振荡器及时钟电路。同时，AT89C51降至0Hz的静态逻辑操作，并支持两种可选的节电工作模式。空闲方式体制CPU的工作，但允许RAM，定时/计数器，串行通信口及中断系统继续工作。掉电方式保存RAM中的内容，但振荡器体制工作并禁止其他所有不见工作直到下一个硬件复位。
引脚功能说明 ·Vcc：电源电压 ·GND：地
·P0口：P0口是一组8位漏极开路型双向I/O口，也即地址/数据总线复用。作为输出口用时，每位能吸收电流的方式驱动8个TTL逻辑门电路，对端口写“1”可作为高阻抗输入端用。
在访问外部数据存储器或程序存储器时，这组口线分时转换地址（低8位）和数据总线复用，在访问期间激活内部上拉电阻。
在Flash编程时，P0口接受指令字节，而在程序校验时，输出指令字节，校验时，要求外接上拉电阻。
·P1口：P1是一个带内部上拉电阻的8位双向I/O口，P1的输出缓冲级可驱动（吸收或输出电流）4个TTL逻辑门电路。对端口写“1”，通过内部的上拉电阻把端口拉到高电平，此时可作输入口。作为输入口使用时，因为内部存在上拉电阻，某个引脚被外部信号拉低时会输出一个电流（IIL）。
Flash编程和程序校验期间，P1接受低8位地址。
·P2口：P2是一个带有内部上拉电阻的8位双向I/O口，P2的输出缓冲级可驱动（吸收或输出电流）4个TTL逻辑门电路。对端口写“1”，通过内部的上拉电阻把端口拉到高电平，此时可作输入口。作为输入口使用时，因为内部存在上拉电阻，某个引脚被外部信号拉低时会输出一个电流（IIL）。
在访问外部程序存储器或16位四肢的外部数据存储器（例如执行MOVX @DPTR指令）时，P2口送出高8位地址数据，在访问8位地址的外部数据存储器（例如执行MOVX @ RI指令）时，P2口线上的内容（也即特殊功能寄存器（SFR）区中R2寄存器的内容），在整个访问期间不改变。
Flash编程和程序校验时，P2也接收高位地址和其他控制信号。
·P3口：P3是一个带有内部上拉电阻的8位双向I/O口，P3的输出缓冲级可驱动（吸收或输出电流）4个TTL逻辑门电路。对端口写“1”，通过内部的上拉电
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阻把端口拉到高电平，此时可作输入口。作为输入口使用时，因为内部存在上拉电阻，某个引脚被外部信号拉低时会输出一个电流（IIL）。
·RST：复位输入。当振荡器工作时，RST引脚出现两个机器周期以上高电平将使单片机复位。
·ALE/PROG：当访问外部程序存储器或数据存储器时，ALE（地址锁存允许）输出脉冲用于锁存地址的低8位字节。即使不访问外部存储器，ALE仍以时钟振荡频率的1/6输出固定的正脉冲信号，因此它可对外输出时钟或用于定时目的。要注意的是，每当访问外部数据存储器时将跳过一个ALE脉冲。
对Flash存储器编程期间，该引脚还用于输入编程脉冲（PROG）。
如有必要，可通过对特殊功能寄存器（SFR）区中的8EH单元D0位置位，可禁止ALE操作。该位置位后，只有一条MOVX和MOVC指令ALE才会被激活。此外，该引脚会被微弱拉高，单片机执行外部程序时，应设置ALE无效。
·PSEN：程序存储允许输出是外部程序存储器的读选通型号，当89C51由外部存储器取指令（或数据）时，每个机器周期两次PSEN有效，即输出两个脉冲。在此期间，当访问外部数据存储器，这两次有效的PSEN信号不出现。
·EA/VPP：外部访问允许。欲使CPU仅访问外部程序存储器（地址为
0000H—FFFFH），EA端必须保持低电平（接地）。需注意的是：如果加密位LB1被编程，复位时内部会锁存EA端状态。
89C51的程序存储器阵列是采用字节写入方式编程的，每次写入一个字符，要对整个芯片的EPROM程序存储器写入一个非空字节，必须使用片擦除的方法将整个存储器的内容清楚。
·数据查询
89C51单片机用数据查询方式来检测一个写周期是否结束，在一个写周期中，如需要读取最后写入的那个字节，则读出的数据的最高位（P0.7）是原来写入字节的最高位的反码。写周期开始后，可在任意时刻进行数据查询。
·Ready/Busy:字节编程的进度可通过Ready/Busy输出信号检测，编程期间，ALE变为高电平“H”后P3.4（Ready/Busy）端被拉低，表示正在编程状态（忙状态）。编程完成后，P3.4变为高电平表示准备就绪状态。
·程序校验：如果加密位LB、LB2没有进行编程，则代码数据可通过地址和数据线读回原编写的数据，采用下图的电路，程序存储器的地址由P1口和P2口的P2.0—P2.3输入，数据由P0口读出，P206、P2.7和P3.6、P3.7的控制信号见表6，PSEN保持低电平，ALE、EA和RST保持高电平。校验时，P0口必须接上10k左右的上拉电阻。
微机接口实现两种信息形式的交换。在计算机之外，由电子系统所处理的信息以一种物理信号形式存在，但在程序中，它是用数字表示的。任一接口的功能都可
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分为以某种形式进行数据库变换的一些操作，所以外部和内部形式的转换是由许多步骤完成的。
模拟-数字转换器（ADC）用来将连续变化信号变成相应的数字量，这数字量可是可能性的二进制数值中的一固定值。如果传感器输出不是连续变化的，就不需模拟-数字转换。这种情况下，信号调理单元必须将输入信号变换成为另一信号，也可直接与接口的下一部分，即微计算机本身的输入输出单元相连接。
输出接口采用相似的形式，明显的差别在于信息流的方向相反；是从程序到外部世界。这种情况下，程序可称为输出程序，它监督接口的操作并完成数字-模拟转换器（DAC）所需数字的标定。该子程序依次送出信息给输出器件，产生相应的电信号，由DAC转换成模拟形式。最后，信号经调理（通常是放大）以形成适应于执行器操作的形式。
在微机电路中使用的信号几乎总是太小而不能被直接地连到“外部世界”，因而必须用某种形式将其转换成更适宜的形式。接口电路部分的设计是使用微机的工程师所面临最重要的任务之一。我们已经了解到微机中，信号以离散的位形式表示。当微机要与只有打开或关闭操作的设备相连时，这种数字形式是最有用的，这里每一位都可表示一开关或执行器的状态。
为了解决实际问题，一个单片机不仅包括CPU，程序和数据存储器，另外，它必须含有通过CPU访问外部信息的硬件。一旦CPU收集到数据信息和流程，它必须能够改变外部领域的一部分，这些硬件设备称作外围设备，它们是CPU通往外部的窗口。
单片机可利用外围设备中最基本的用于一般用途的I/O接口，每个I/O接口既可作为输入端又可作为输出端，每个I/O接口的功能取决与程序初始化阶段对数据方位寄存器相应位进行置一和清零操作，通过CPU指令对数据寄存器相应位进行置一和清零来置一和清零输出端口，同样输入端口逻辑位也可以通过CPU指令访问。
一些类型的串行口单元允许CPU与外部设备进行串口通信，用串口位代替平行位进行通信需要少许的I/O口，这样使通信费用降低但速度也相对慢些。串口传送可以同步也可以异步。
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